8.3. pyopus.netlister.kicadso — KiCad netlister support for Spice Opus

Outputs a Spice Opus netlist from data imported from a kicad XML netlist.

Make sure pyopus.lib and pyopus.dcm are installed. Add pyopus to your libraries list by selecting Preferences/Component Libraries in the Eeschema menu and clicking Add. This will add the pyopus symbols to the list of libraries so that you can use them in the schematic editor.

One KiCad sheet with its subsheets (one schematic project) defines one subcircuit or one toplevel circuit. The following symbols are available.

Built-in devices:

  • RES - resistor specified by resistance
  • RES_SEMI - semiconductor resistor specified by model and dimensions
  • CAP - capacitor specified by capacitance
  • CAP_SEMI - semiconductor capacitor specified by model and dimensions
  • IND - inductor
  • IND_COUPLING - inductive coupling
  • VSRC - independent voltage source. Its function is specifid with
    SPICE syntax by setting the Specification field
  • ISRC - independent current source. Its function is specifid with
    SPICE syntax by setting the Specification field
  • VCVS - voltage-controlled voltage source
  • CCVS - current-controlled voltage source
  • VCCS - voltage-controlled current source
  • CCCS - current-controlled current source
  • VSRC_NONLIN - nonlinear controlled voltage source
  • ISRC_NONLIN - nonlinear controlled current source
  • SW - voltage-controlled switch
  • CSW - current-controlled switch
  • NPN, PNP - bipolar junction transistor
  • NMOS, PMOS - MOSFET
  • NJF, PJF - JFET
  • NMF, PMF - MESFET
  • LOSSLESS_LINE - lossless transmission line
  • LOSSY_LINE - lossless transmission line
  • URC_LINE - uniform distributed RC line

Subcircuits: * OPAMP - operational amplifier * OPAMP_DIFF - operational amplifier with diff. output * OTA - operational transconductance amplifier * OTA_DIFF - operational transconductance amplifier with diff. output

If a device is not known to the netlister (not defined in the Mapping memeber of the configuration) it is treated as a subcircuit.

The Value field is the name of the subcircuit definition. By default pins are assigned in increasing pin number order. This can be customized by setting the PinMap field which must be a space-separated list of pin numbers. The netlister assumes the subcircuit has no parameters. The space-separated list of allowed parameters can be specified with the Parameters field. Note that Parameters must be defined in order for the netlister to count the passed parameters and decide if the instance needs the param: keyword or not. Parameters values are passed by setting the corresponding fields of the component. Arbitrary strings can be appended to the end of the subcircuit instance with the Specification field.

Special directives:

  • INCLUDE - includes an external file
  • LIB - includes a section of an external library file
  • MODEL - defines a model
  • SUPPRESS_END - does not add .end at the end of netlists that do not
    define a subcircuit. Useful for netlisting a top-level circuit as an include file. The .end can also be suppressed by setting SuppressEnd in the configuration to True.
  • SUBCKT - specifies this sheet and its subsheets define a subcircuit.
    The subcircuit name and pin order are fields of this component. Pins are specified with the corresponding net names. To specify a net name for a net, use a global label.
  • SUBCKT PARAM - defines a subcircuit parameter and its default value.
  • PARAM - defines a new parameter whose value is defined by an
    expression.
  • OUTPUT_FILE - specifies the output file name for the netlister. Overrides
    the file name chosen in the Netlist Export dialog. The file name specified in the dialog is used for the intermediate XML netlist, but not for the final output file. The output file can be a relative path (relative to the folder where the XML netlist is stored). Absolute paths are not allowed.

All special directives have a refdes of the form A<number>. INCLUDE and LIB directives also have a Position field which places the directive at the top (bottom) of the netlist when set to top (bottom). INCLUDE and LIB directives are grouped by their position (top, bottom) and dumped in the order specified by the refdes number.

Parameter definitions specified by the PARAM directive are dumped in the order defined by the refdes number. If the sheet defines a subcircuit they are placed inside the subcircuit definition (they are local parameters).

Subcircuit parameters are also ordered by their refdes numbers.

MODEL definitions are dumped before the instances. If the sheet defines a subcircuit all model definitions are placed inside the subcircuit definition (they are local models).

Instances are grouped by sheets.

Ground nets defined in the configuration are mapped to node 0. They are treated as global nodes.

The netlister can also include verbatim text from the schematic. Verbatim texts must have first line of the form Text<number> position=top|bottom followed by a newline and the verbatim text that should be included in the netlist. Block number must be unique.

The complete hierarchy is searched for verbatim text blocks. For the search to to work all schematic files must be in the same folder and the netlister must be started in that folder (because sheet source file name is dumped by KiCad without full path).

The collected blocks are grouped by their specified position (top, bottom) and ordered by their number. Top blocks are dumped after the last top INCLUDE/LIB directive. Bottom blocks are dumped before the first bottom INCLUDE/LIB directive.

Verbatim text blocks can be used for including a .control block in the netlist.