THE SLIDE RULE OF SILICON DESIGN
Free Analog Circuit Simulation
EAGLE is a schematic capture and printed circuit board (PCB) design package that includes a powerful User Language. Using that language, it is possible to write User Language Programs (ULPs) that can capture information from schematic editor file and produce an arbitrary output. We wrote a ULP that generates a Spice netlist. This document contains instructions for using the program.
Drawing a Schematic
First step in generating a Spice netlist is to draw a schematic. There are a few simple rules to follow.
>NAME N1 N2 ... Nn >VALUE
Generating Spice Net List
A Spice netlist is generated from a schematic by running the spice ULP from command line. The syntax of the program execution is
RUN spice.ulp [working directory path [master document name [output file name]]]
Working directory is the one where output file (by default with the same name as the schematic file but the .cir extension) will be generated and where the master document resides (named "master.cir" by default).